clk_rst_drv.c 2.6 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394
  1. #include "board.h"
  2. void PeriClk0MutEnable(uint32_t ClkBitMsk)
  3. {
  4. rt_base_t level;
  5. level = rt_hw_interrupt_disable();
  6. M0P_SYSCTRL->PERI_CLKEN0 |= ClkBitMsk;
  7. rt_hw_interrupt_enable(level);
  8. }
  9. uint32_t M0P_SYSCTRL_PERI_CLKEN1_BACKUP = 0;
  10. void PeriClk1MutEnable(uint32_t ClkBitMsk)
  11. {
  12. rt_base_t level;
  13. level = rt_hw_interrupt_disable();
  14. M0P_SYSCTRL_PERI_CLKEN1_BACKUP |= ClkBitMsk;
  15. M0P_SYSCTRL->PERI_CLKEN1 = M0P_SYSCTRL_PERI_CLKEN1_BACKUP;
  16. rt_hw_interrupt_enable(level);
  17. }
  18. void PeriClk0MutDisable(uint32_t ClkBitMsk_n)
  19. {
  20. rt_base_t level;
  21. level = rt_hw_interrupt_disable();
  22. M0P_SYSCTRL->PERI_CLKEN0 &= ClkBitMsk_n;
  23. rt_hw_interrupt_enable(level);
  24. }
  25. void PeriClk1MutDisable(uint32_t ClkBitMsk_n)
  26. {
  27. rt_base_t level;
  28. level = rt_hw_interrupt_disable();
  29. M0P_SYSCTRL_PERI_CLKEN1_BACKUP &= ClkBitMsk_n;
  30. M0P_SYSCTRL->PERI_CLKEN1 = M0P_SYSCTRL_PERI_CLKEN1_BACKUP;
  31. rt_hw_interrupt_enable(level);
  32. }
  33. void MutResetPeri(peri_reset_t PeriRst)
  34. {
  35. rt_base_t level;
  36. uint32_t PeriRstMsk;
  37. PeriRstMsk = ~(0x1u<<(PeriRst&0x1Fu));
  38. level = rt_hw_interrupt_disable();
  39. if (PeriRst<32){
  40. M0P_RESET->PERI_RESET0 = 0x7F7F6FFF & PeriRstMsk;
  41. M0P_RESET->PERI_RESET0 = 0x7F7F6FFF;
  42. } else {
  43. M0P_RESET->PERI_RESET1 = 0x00000318 & PeriRstMsk;
  44. M0P_RESET->PERI_RESET1 = 0x00000318;
  45. }
  46. rt_hw_interrupt_enable(level);
  47. }
  48. #define CLKTRIM_RUN_TIME 40
  49. void clktrim_init(void)
  50. {
  51. PeriClk_MutEnable(PeriClk_Trim);
  52. M0P_CLK_TRIM->CR = (0<<8) | // calclk_sel[2],
  53. (0<<7) | // IE, interrupt 0:off; 1:on;
  54. (0<<6) | // mon_en, monitor 0:off; 1:on;
  55. // (0<<4) | // calclk_sel[1:0], 0:RCH, 1:XTH; 2:RCL; 3:XTL; 4:PLL;
  56. (1<<4) | // calclk_sel[1:0], 0:RCH, 1:XTH; 2:RCL; 3:XTL; 4:PLL;
  57. (3<<1) | // refclk_sel[1:0], 0:RCH, 1:XTH; 2:RCL; 3:XTL;
  58. (0<<0); // trim_start, 0:stop; 1:start;
  59. M0P_CLK_TRIM->REFCON = 32768*CLKTRIM_RUN_TIME;
  60. M0P_CLK_TRIM->CR_f.TRIM_START = 1;
  61. }
  62. clkoffset_t clktrim_check(void)
  63. {
  64. clkoffset_t ofst;
  65. if (M0P_CLK_TRIM->IFR_f.STOP){
  66. ofst.valid = 1;
  67. // ofst.ppm = (1000000.0f/(4000000*CLKTRIM_RUN_TIME))*((float)M0P_CLK_TRIM->CALCNT - 4000000*CLKTRIM_RUN_TIME);
  68. ofst.ppm = (1000000.0f/(7372800*CLKTRIM_RUN_TIME))*((float)M0P_CLK_TRIM->CALCNT - 7372800*CLKTRIM_RUN_TIME);
  69. M0P_CLK_TRIM->CR_f.TRIM_START = 0;
  70. M0P_CLK_TRIM->CR_f.TRIM_START = 1;
  71. } else {
  72. ofst.valid = 0;
  73. }
  74. return(ofst);
  75. }