_nop_fdivf4b05cc8de6347ae6fc0bc687737c283-154403DFDAAEC7869A45D983AA0425BC.bin 1.6 KB

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  1. //
  2. // Generated by NVIDIA NVVM Compiler
  3. //
  4. // Compiler Build ID: UNKNOWN
  5. // Unknown Toolkit Version
  6. // Based on NVVM 7.0.1
  7. //
  8. .version 8.1
  9. .target sm_86, texmode_independent
  10. .address_size 32
  11. // .globl DynamicKernel_nop_fdiv
  12. .entry DynamicKernel_nop_fdiv(
  13. .param .u32 .ptr .global .align 8 DynamicKernel_nop_fdiv_param_0,
  14. .param .f64 DynamicKernel_nop_fdiv_param_1,
  15. .param .f64 DynamicKernel_nop_fdiv_param_2
  16. )
  17. {
  18. .reg .pred %p<8>;
  19. .reg .b32 %r<10>;
  20. .reg .f64 %fd<13>;
  21. ld.param.u32 %r2, [DynamicKernel_nop_fdiv_param_0];
  22. ld.param.f64 %fd5, [DynamicKernel_nop_fdiv_param_1];
  23. ld.param.f64 %fd6, [DynamicKernel_nop_fdiv_param_2];
  24. mov.b32 %r3, %envreg3;
  25. mov.u32 %r4, %ctaid.x;
  26. mov.u32 %r5, %ntid.x;
  27. mov.u32 %r6, %tid.x;
  28. add.s32 %r7, %r6, %r3;
  29. mad.lo.s32 %r1, %r5, %r4, %r7;
  30. abs.f64 %fd8, %fd6;
  31. setp.gtu.f64 %p1, %fd8, 0d7FF0000000000000;
  32. mov.f64 %fd7, 0d7FF8000000000214;
  33. mov.f64 %fd12, %fd7;
  34. @%p1 bra $L__BB0_7;
  35. abs.f64 %fd1, %fd5;
  36. setp.gtu.f64 %p2, %fd1, 0d7FF0000000000000;
  37. setp.neu.f64 %p3, %fd6, 0d0000000000000000;
  38. mov.f64 %fd12, 0d0000000000000000;
  39. and.pred %p4, %p3, %p2;
  40. @%p4 bra $L__BB0_7;
  41. setp.le.f64 %p5, %fd1, 0d7FF0000000000000;
  42. @%p5 bra $L__BB0_5;
  43. bra.uni $L__BB0_3;
  44. $L__BB0_5:
  45. setp.eq.f64 %p7, %fd6, 0d0000000000000000;
  46. mov.f64 %fd12, %fd7;
  47. @%p7 bra $L__BB0_7;
  48. div.rn.f64 %fd12, %fd5, %fd6;
  49. bra.uni $L__BB0_7;
  50. $L__BB0_3:
  51. setp.eq.f64 %p6, %fd6, 0d0000000000000000;
  52. mov.f64 %fd12, %fd7;
  53. @%p6 bra $L__BB0_7;
  54. rcp.rn.f64 %fd12, %fd6;
  55. $L__BB0_7:
  56. shl.b32 %r8, %r1, 3;
  57. add.s32 %r9, %r2, %r8;
  58. st.global.f64 [%r9], %fd12;
  59. ret;
  60. }
  61. ��